The invention generally relates to electronic devices providing differential signaling outputs, and more particularly to an integrated topology for a Low Voltage Differential Signaling (LVDS) driver and High-speed current steering Logic (HCSL) driver.
Various I/O signaling methods are known in the art for use within an individual device or in a communication channel between two or more devices. Two well-known signaling methods commonly used in systems requiring high speed signaling include, Low Voltage Differential Signaling (LVDS) and High-Speed Current Steering Logic (HCSL) signaling. LVDS differential outputs are characterized by low voltage swings and low power consumption. HCSL drivers have higher voltage swings and provide faster switching speeds than LVDS drivers, but they also consume more power. In order to take advantage of both signaling technologies, LVDS and HCSL signaling methods are often incorporated onto a single integrated circuit device using dedicated LVDS driver circuits and HCSL driver circuits. Typically, the dedicated LVDS and HCSL driver circuits are connected in parallel, and a designer may choose to enable one of the drivers to implement either the LVDS driver circuitry or the HCSL driver circuitry, to meet the requirement of a particular design. However, a device employing dedicated LVDS and HCSL driver circuits requires an unnecessary duplication of circuitry, resulting in a number of disadvantages, including larger area requirements, higher cost and reduced flexibility in the design.
Accordingly, there is a need in the art for a circuit topology that utilizes common circuitry to implement two different signaling schemes on a single integrated circuit device, so as to provide flexibility in design and to reduce the size and cost of the device.